This Space Is Implied

Phil Cayton

Data Movement Architect

I eliminate infrastructure bottlenecks that starve GPUs in large-scale AI and HPC systems. My focus is removing unnecessary layers between where data lives and where useful work needs to happen, bridging architecture, storage, fabrics, and interconnects across multi-vendor ecosystems.

The pattern remains consistent: Data is here. Useful work needs it there. Everything in between is suspect. 

If accelerators wait for data, the architecture has fallen behind.

My goal is ensuring infrastructure evolves with modern workloads. I drive vendor-agnostic I/O acceleration, Composable Disaggregated Infrastructure, high-performance fabrics, and shared storage architectures. I build consensus across companies and standards bodies to make these advanced environments practical and interoperable. 

My leadership in industry governance includes serving as a Board Member for NVM Express (NVMe) and the OpenFabrics Alliance (OFA), as well as Co-Chair of the Ultra Ethernet Consortium (UEC) Storage Working Group and Co-Chair of the NVMe Boot Task Group.

I develop architectures that move data between machine memories without involving CPUs and kernels in every byte of motion. As one of the original designers of NVMe over Fabrics (NVMe-oF) and the NVMe RDMA transport, I developed the initial prototype host and target driver stacks. Backed by over 25 U.S. patents in fabric-attached memory, mesh topologies, and real-time RDMA routing, my designs collapse the boundary between external storage and local system performance.

In the AI era, the core principle never changes: Keep the expensive compute engine fed. That is the through-line of my career across storage, fabrics, standards, and systems architecture.